In recent years, studies have been made on packages employing flip-chip bonding to mount a semiconductor apparatus on a circuit substrate. The flip-chip bonding utilizes a bump structure.
Patent Document 1 (Japanese Unexamined Patent Publication No. 264540/1996 (Tokukaihei 8-264540); publication date: Oct. 11, 1996) describes a conventionally-utilized bump structure that includes a first bump and a second bump. The first bump is substantially cylindrical and is made of a conductive material. A bottom surface of the first bump is fixed to an electrode. The second bump is substantially cylindrical and is made of a conductive material that is the same kind as that of the first bump. A bottom surface of the second bump is fixed to an upper surface of the first bump.
Patent Document 2 (Japanese Unexamined Patent Publication No. 2004-247672; publication date: Sep. 2, 2004) describes a conventionally-utilized method of forming a bump structure, which method includes the following six steps. In the first step, a ball is formed at a tip of a wire inserted in a capillary, and the ball is bonded to a conductor, thereby forming a squashed ball. In the second step, the capillary is moved upward and in a lateral direction so that a flat section of a lower end of the capillary is positioned to face the squashed ball. In the third step, the capillary is moved downward to press against the squashed ball, thereby forming a first bump. In the fourth step, the capillary is moved upward and in a lateral direction opposite to the lateral direction in which the capillary is moved in the second step so that the flat section of the lower end of the capillary is positioned to face the first bump. In the fifth step, the capillary is moved downward to bend the wire and then press the wire against the first bump, thereby forming a second bump. Finally in the sixth step, the wire is torn off from the second bump.
Patent Document 3 (Japanese Unexamined Patent Publication No. 2002-76048; publication date: Mar. 15, 2002) describes a conventionally-utilized method of arranging a bump structure. The method is for a case in which a chip component and a wiring board are bonded together by flip-chip bonding via bumps, which are protruded electrodes, formed on a plurality of pads, which are to serve as electrodes, arranged in line on a front surface of the chip component. According to the method, the bumps are disposed in such a manner that the positions of the bumps are shifted alternately in a direction substantially orthogonal to the direction in which the pads are arranged.
Patent Document 4 (Japanese Unexamined Patent Publication No. 2002-329742; publication date: Nov. 15, 2002) describes a conventionally-utilized semiconductor apparatus to be mounted on a circuit substrate by use of a bump structure. In the semiconductor apparatus, bonding pads, to which external connection wires or bumps are to be bonded, are disposed on a semiconductor chip in a zigzag pattern. Testing pads, with which probes are to be brought into contact in wafer testing, are provided in a residual space after the bonding pads are disposed in the zigzag pattern.
Patent Document 5 (Japanese Unexamined Patent Publication No. 2001-176908; publication date: Jun. 29, 2001) describes a method of producing a semiconductor apparatus. According to the method, a conductive bonding agent is prevented from extending, in a direction of an adjacent electrode, on a semiconductor carrier. Further, an area of a head section (upper section) of a bump is enlarged. With the method, a sufficient amount of the conductive bonding agent is provided to the bump, and adjacent electrodes are connected electrically stably without short-circuit.
The following describes what disclosed in Patent Document 5, with reference to FIGS. 7(a) to 7(d) and FIGS. 8(a) and 8(b). Specifically, the following describes in detail the conventional bump structure for flip-chip bonding, the method of forming the bump structure, and the structure of the flip-chip bonding.
FIGS. 7(a) to 7(d) show the bump structure and the method of forming the bump structure. Wire bonding is carried out with respect to an electrode pad 102. As shown in FIG. 7(a), a ball 116 is formed at a tip of a wire 115, which tip is at a tip section of a capillary 114. Then, as shown in FIG. 7(b), ultrasonic frequency is applied to the electrode pad 102 so that the ball 116 is thermally squashed with the use of the capillary 114, thereby forming a squashed ball 117a. Then, as shown in FIG. 7(c), the capillary 114 is moved upward, and at the same time, moved either parallel or upward to the left/right, thereby tearing the wire 115 off to form a tail section 117b. Then, as shown in FIG. 7(d), leveling is carried out to make the height even, thereby forming a bump structure 118 in which the tail section 117b is formed on the squashed ball 117a. 
FIGS. 8(a) and 8(b) show the structure of the flip-chip bonding with the bump structure. A bump structure 218, constituted of a pedestal section 217a and a tail section 217b, is formed on an electrode pad 202 of a semiconductor chip 201. The bump structure 218 is bonded to a bonding pad 207, which is formed in a base substrate 211, via a conductive resin 212. The semiconductor chip 201 is mounted, with its surface facing downward to the base substrate 211. Seal resin 213 is filled in between the semiconductor chip 201 and the base substrate 211, and is hardened.
With the bump structure 218 employed in the flip-chip bonding, the tail sections 217b are disposed in a zigzag pattern, as shown in FIG. 8(b), so that a distance between bonding pads 207 is widened. This reduces a risk of short-circuit in between adjacent electrodes.
However, the foregoing conventional bump structure, method of producing the bump structure, and the semiconductor apparatus using the bump structure have the following problems. Specifically, bonding reliability is low between the bump structure and the bonding pad. Further, the degree of freedom is low in designing a structure of a semiconductor apparatus exemplified by a bonding pad. Furthermore, mechanical stress is not absorbed efficiently.
For example, in the method shown in FIGS. 7(a) to 7(d), the tail section 117b is formed by tearing off the wire 115. This causes the length of the tail section 117b to be unstable. The method therefore has a problem that bonding reliability is low between the tail section 117b and the bonding pad (not illustrated). Further, to make the length of the tail section 117b stable in the foregoing method, leveling is necessary. This causes costs to increase.
Further, it is extremely difficult in the foregoing conventional methods to adjust the length and the direction of the tail section. Therefore, even when the bump structure 218 is arranged in the zigzag pattern as shown in FIG. 8(b), it is difficult to keep a sufficient distance between bonding pads. Thus, there remains a risk of short-circuit. Further, as shown in FIG. 8(a), the position of the bonding pad 207 is determined automatically by the position of the electrode pad 202 formed on the semiconductor chip 201. Therefore, there is a problem that the degree of freedom is low in designing the wiring 208. Further, if progress is to be made in narrowing the pitch of the electrode pads 202 on the semiconductor chip 201 (for example, the distance between the electrode pads 202 is narrowed to 60 μm or below), the following problems arise. Specifically, it becomes difficult to equalize the distance between the bonding pads 207 with the distance between the electrode pads 202. Further, costs of the base substrate 211 increase extremely. Furthermore, the bonding pads 207 are no longer allowed to have a wide width. Therefore, an area where the bonding pad 207 and the bump structure 218 are bonded to each other decreases, and a volume of the bump structure 218 decreases. This degrades bonding reliability of a section where the bonding pad 207 and the bump structure 218 are bonded together. Moreover, there is another problem that it becomes difficult for the bump structure 218 to absorb mechanical stress applied to a section where the bump structure 218 and the electrode pad 202 are bonded together and to the section where the bump structure 218 and the bonding pad 207 are bonded together.